Board-Day Execution
Board-Day Worksheet
Printable operator worksheet for the first FPGA module and carrier-board sessions. Use this alongside the bring-up plan and artifact inventory to capture evidence, pass/fail state, and blockers in real time.
Session metadata
| Date / Time | | Operator | |
| Carrier board revision | | FPGA module revision | |
| MCU firmware commit | | FPGA bitstream / probes tag | |
| Power supply setup | | Ambient temperature | |
Pre-power checks
| Check |
Expected evidence |
Status |
Notes |
| Carrier jumpers / default straps reviewed | Documented against board notes | | |
| Module seating and connectors inspected | No bent pins, no obvious shorts, no cable strain | | |
| RF transmit path kept disabled for initial power-up | Safe GPIO / supply state confirmed | | |
| Chosen image set identified | Heartbeat, debug, or baseline image selected intentionally | | |
Power and configuration checks
| Step |
Expected evidence |
Status |
Notes |
| Initial power applied | Idle current within planned envelope, no thermal surprise | | |
| JTAG enumeration | Target device visible in hardware manager | | |
| Bitstream programming | DONE = HIGH, INIT_COMPLETE = asserted | | |
| Optional probes load | Expected ILA cores enumerate | | |
| Reset / heartbeat sanity | Deterministic reset release and status activity | | |
Firmware and control-path checks
| Check |
Expected evidence |
Status |
Notes |
| USART3 bring-up log | Boot messages present with timestamps | | |
| AD9523 status | Status pins/logs indicate healthy clocking | | |
| ADF4382A TX/RX init | Initialization returns OK, lock states sensible | | |
| ADAR1000 communication | Scratchpad/readback passes on all devices | | |
| Temperature / health checks | No early overtemp, fault, or emergency shutdown | | |
FPGA data-path and USB checks
| Stage |
Expected evidence |
Status |
Notes |
| Raw ADC visibility | ILA or status evidence shows activity on expected clock | | |
| DDC / matched-filter activity | Valid strobes and non-flat outputs observed | | |
| USB framing sanity | Headers, payload length, and footer remain consistent | | |
| FT601 behavior | No obvious backpressure or bus-direction anomalies | | |
| Sustained streaming trial | No immediate lockup, framing drift, or reset event | | |
Measurements to record
| Measurement |
Observed value |
Notes |
| Carrier/module idle current | | |
| 5V / 3V3 rails | | |
| LO lock indicators | | |
| ADAR temperatures | | |
| PA IDQ spot checks | | |
| USB enumeration / throughput notes | | |
Stop conditions encountered?
| Condition |
Triggered |
Notes |
| Unexpected current or thermal rise | | |
| LO lock/readback disagreement | | |
| ADAR comm failure | | |
| USB framing or bus-direction anomaly | | |
| Reset / clock ambiguity | | |
| Other blocker | | |
Outcome
| Session result | | Next image to use | |
| Main blocker | |
| Next action owner | | Target completion | |